(1) Field of the Invention
The present invention is related to semiconductor fabrication. More specifically the present invention is related to fabrication of epitaxial (EPI) quality wafers.
(2) Background Information
Epitaxial (EPI) quality wafers (hereinafter referred to as "EPI wafers") are well-known in the art. The term "epitaxial" is defined as the growth of a single-crystal semiconductor film upon a single-crystal substrate. An epitaxial layer has the same crystallographic characteristics as the substrate material. The single-crystalline epitaxial structure comes about when silicon atoms are deposited on a bare silicon wafer in a Chemical Vapor Deposition ("CVD") reactor. When chemical reactants are controlled and the system parameters are set correctly, the depositing atoms arrive at the wafer surface with sufficient energy to move around on the surface and orient themselves to the crystal arrangement of the wafer atoms.
EPI wafers typically include a substrate of a heavily doped silicon onto which a layer of approximately 1 to 3 microns is epitaxially grown. FIG. 1 illustrates a cross sectional view through an EPI wafer onto which a transistor 105 (shown within dotted lines) is built. Transistor 105 has a gate 106 formed on EPI layer 104 and active regions 108 and 110 formed into EPI layer 104. The EPI wafer includes a heavily doped silicon substrate 102 on which an epitaxial low doped layer 104 of 1-3 micrometers is grown. EPI layer 104 by definition has a low doping which makes it very desirable for building transistors. Layer 104's low doping leads to substantial reduction in the transistor's junction capacitances C.sub.1 and C.sub.2. Typically, the smaller the junction capacitances of a transistor, the faster the transistor is. Because junction capacitances are proportional to the doping of layer 104, junction capacitances C.sub.1 and C.sub.2 are relatively low.
While EPI layers present the advantage explained above in connection with their lower doping, EPI wafers are very costly. Conventional EPI wafers may run up to approximately $200.00. Moreover, while several methods have been proposed to obtain EPI wafers at a cheaper cost, the proposed methods are limited to providing transistors out of EPI layers that have thicknesses smaller than 1 micrometer. EPI layers having thicknesses of less than 1 micrometer cause the transistors fabricated onto these layers to be limited in performance as these transistors have relatively large junction capacitances. The large junction capacitances are due, mainly, to the fact that as the EPI layer is thin, the junction capacitances extend in the heavily doped substrate.